The present invention generally relates to liquid crystal display devices and more particularly to a liquid crystal display device having a thin-film transistor (TFT).
Liquid crystal display devices are used extensively in information processing apparatuses such as a computer as a compact display device consuming little electric power.
In order to realize a high-quality color representation, recent liquid crystal display devices tend to use a so-called active-matrix driving method, in which each of the pixel electrodes in the liquid crystal display device is turned on and off by a corresponding TFT that is provided on a glass substrate constituting the liquid crystal display device in correspondence to the pixel electrode.
FIG.1 shows the construction of a conventional active-matrix type liquid crystal display device 10.
Referring to FIG.1, the liquid crystal display device 10 includes a TFT glass substrate 11 carrying thereon a number of TFTs and corresponding transparent pixel electrodes, and a glass substrate 12 is provided on the TFT substrate 11 so as to face the TFT substrate 11 with a gap formed therebetween. The gap thus formed is filled by a liquid crystal layer 1 in the state that the liquid crystal layer 1 is confined between the TFT substrate 11 and the opposing substrate 12 by a seal member not illustrated.
In the conventional liquid crystal display device 10 of the foregoing construction, the direction of the liquid crystal molecules in the liquid crystal layer 1 is selectively modified by applying a drive voltage to a selected pixel electrode via a corresponding TFT.
Further, it should be noted that the liquid crystal display device 10 includes a pair of polarizers at respective outer sides of the glass substrates 11 and 12 in the crossed Nicol state, and the glass substrates 11 and 12 further carry molecular alignment films on the respective interior sides thereof in contact with the liquid crystal layer 1.
FIG.2 shows a part of the TFT substrate 11 in an enlarged scale.
Referring to FIG.2, the TFT substrate 11 carries thereon a number of pad electrodes 11A for receiving a scanning signal and a number of scanning electrodes 11a each extending from a corresponding pad electrode 11A in a first direction. Further, the TFT substrate 11 carries thereon a number of pad electrodes 11B for receiving an image signal and a number of signal electrodes 11b each extending from a corresponding pad electrode 11B in a second direction generally perpendicular to the first direction. Further, in correspondence to each intersection of a scanning electrode 11a and a signal electrode 11b, there is provided a TFT 11C and a corresponding transparent pixel electrode 11D.
In the liquid crystal display device 10 of the foregoing construction, one of the scanning electrodes 11a is selected by selectively supplying a scanning signal to the corresponding electrode pad 11A. Further, a signal electrode 11b is selected by supplying an image signal to the corresponding electrode pad 11B. Thereby, the image signal is forwarded to the corresponding transparent pixel electrode 11D via the TFT 11C.
FIG.3 shows the construction of a conventional TFT 11C.
Referring to FIG.3, the TFT 11C is constructed on a glass substrate 21 corresponding to the TFT substrate 11 of FIG.1 and includes a gate electrode 22 formed on the glass substrate 21 in electrical connection to the scanning electrode 11a, wherein a gate insulation film 23 provided on the glass substrate 21 covers the gate electrode 22. Further, an amorphous silicon pattern 24 is provided on the gate insulation film 23 so as to cover the gate electrode 22. Typically, the gate electrode 22 is formed of an Al--Nd alloy or an Al--Sc alloy.
It should be noted that the foregoing amorphous silicon pattern 24 constitutes the active region of the TFT 11C and is covered by a channel protection pattern 25 of SiN in the part corresponding to the channel region of the TFT 11C located immediately above the gate electrode 22.
On the amorphous silicon pattern 24, there are provided a pair of amorphous silicon patterns 26A and 26B of the n.sup.+ -type at both lateral sides of the channel protection pattern 25, and the amorphous silicon pattern 26A carries thereon a Ti layer 27a, an Al layer 27b and a Ti layer 27c consecutively, wherein the layers 27a-27c constitute an ohmic electrode 27A connected to the signal electrode 11b. Similarly, the amorphous silicon pattern 26B carries thereon a Ti layer 27d, an Al layer 27e and a Ti layer 27f consecutively, wherein the layers 27d-27f constitute an ohmic electrode 27B.
It should be noted that the ohmic electrodes 27A and 27B are covered by a protective film 28 of SiN, and a transparent pixel electrode 29 of In.sub.2 SnO.sub.5 (ITO) is provided on the protective film 28, wherein the pixel electrode 29 makes a contact with the uppermost Ti layer 27f of the ohmic electrode 27B via a contact hole formed in the protective film 28.
In the TFT 11C having such a construction, it should be noted that the conduction between the ohmic electrode 27A and the ohmic electrode 27B via the channel region formed in the amorphous silicon pattern 24 is controlled in response to the scanning signal supplied to the gate electrode, and the pixel electrode 29 corresponding to the TFT 11C thus turned on is selectively activated by the image signal supplied to the ohmic electrode 27A.
It should be noted that the fabrication process of the TFT 11C of FIG.3 includes the steps of consecutively depositing, on an amorphous silicon layer constituting the amorphous silicon patterns 26A and 26B, a Ti layer corresponding to the Ti layers 27a and 27b, an Al layer corresponding to the Al layers 27b and 27e, and a Ti layer corresponding to the Ti layers 27c and 27f, followed by a patterning process conducted on the layered structure thus obtained by a dry etching process while using an etching mask. The dry etching process may be conducted typically by an RIE (reactive ion etching) process that uses a mixture of Cl.sub.2 and BCl.sub.3 as an etching gas. As a result of the dry etching process, the foregoing amorphous silicon patterns 26A, 26B and the electrode patterns 27A and 27B are patterned on the amorphous silicon pattern 24 substantially simultaneously.
In such a fabrication process of the TFT 11C, it should be noted that the Al pattern 27b or 27e may experience a selective lateral etching at the exposed edge part of the electrode patterns 27A and 27B as indicated in FIG.3. When such a selective lateral etching occurs in the Al patterns 27b and 27e, there inevitably occurs a problem of overhang formation at the edge part of the ohmic electrode 27A or 27B, wherein the existence of such an overhang structure may induce the problem of failure of electrical connection in the patterns connected to the ohmic electrode 27A or 27B. For example, the electrical connection of the pixel electrode 29 to the ohmic electrode 27B may suffer from such a failure at the receded side edge of the Al pattern 27e.
While it is possible to suppress the overhang formation in the foregoing dry etching process by enhancing the anisotropy of the etching process, such a highly anisotropic dry etching process is also disadvantageous in eliminating the electrical connection failure, as a vertical side edge of the ohmic electrodes 27A and 27B, formed as a result of the highly anisotropic dry etching process, tends to induce a poor step coverage in the conductor pattern such as the pixel electrode 29 extending across the vertical side edge.